ohmygod2 wrote to us with a story from
SF Gate that Apple, unsurprisingly, is going to be one of the purchasers of IBM's PowerPC 970. At this time, though, it's unclear where Apple is going to actually *use* said chip.
Update: 10/14 15:53 GMT by
H : Follow-up to Tim's
story.
Apple becomming much larger... (Score:3, Interesting)
Power 4, here we come (Score:4, Interesting)
The 970 is a derivative of the Power 4 chip (with what I assume to be the Altivec extensions)
These run in the 1.6 -2.0 Gig range
As a Risc chip
with 64 byte chunks.
Granted, I am unsure as of yet if Darwin runs 64 bit natively, but when it does, imagine a dual processor of these (with of course, quartz extreme pushing all of the video over to the Graphics processor).
Maybe I am getting my hopes up, but this is what I have been waiting for. New macintosh, here I come
only 1.8 GHz? (Score:2, Interesting)
anyone know if ibm's powerpc architecture allows them to do this?
EETimes article has more details.. (Score:5, Interesting)
Essentially a derivative of the company's Power4 microprocessor, IBM's PowerPC 970 adds 64-bit PowerPC compatibility, an implementation of the Altivec multimedia instruction-set extensions and a fast processor bus supporting up to 16-way symmetric multiprocessing.
I hope they use a memory controller that does at least DDR 333.
Re:1.8ghz..... (Score:5, Interesting)
As for the GHz issue, the chip does more per-clock than the P4. This means that it can still be competitive. Just wait another day for the MPF, and maybe we'll be able to see some initial SPEC numbers.
I think you'll be pleasantly surprised.
.
Will this require application rewritting? (Score:1, Interesting)
Typical Intel PR blather... (Score:5, Interesting)
Intel takes seriously Andy Groves's words about only the paranoid surviving.
Re:EETimes article has more details.. (Score:5, Interesting)
Re:1.8ghz..... (Score:2, Interesting)
Bad analogy. A 3L F1 engine puts out in excess of 850HP, courtesy of a high tech design that can go in excess of 18,000 RPMs. A 3.5L modern engine in the Altima can put out 240HP, versus the 220 or so horsepower of a 5L Mustang engine of but a few years ago.
Well, Duh. (Score:5, Interesting)
"Critics -- notably Intel -- argue that most desktop users have no need for 64-bit processing. In fact, Microsoft Corp. has yet to release a 64-bit version of Windows that will run on AMD's Hammer chips."
Is it any wonder, given they just lost their defense against Intergraph's patent lawsuit which may result in them not being able to release the Itanium series?
Hey, Intel, last I checked, no one had a use for 32-bit processing or 640K of RAM on the desktop, either.</sarcasm>
Re:Should compete with Pentium 4. Even at 1.8GHz. (Score:4, Interesting)
as for the laptop part, hell yeah. my tibook by the end of 2003 should be nearing the end of it's "useful lifespan" - whatever that is, and i'll probably sell it for half of what i bought it for then and buy the latest, greatest "G5" laptop once it's avalible. that's the plan, at least. i'm in college after all.... and apple has a tendancy to take forever to release a new laptop based on a new processor design.
Re:Apple becomming much larger... (Score:2, Interesting)
I don't think Apple is going anywhere because of its high costs and its inability to produce machines with superior value and/or price. IBM's 64-bit PowerPC chip may be priced more like the Itanic than it will be priced like the Hammer. The Apple Tax is for colored, moulded plastic. So if Apple takes up 64-bit, that only means their survival will be extended for 5 or so more years.
I'm looking forward to Hammer machines running Linux, not an overpriced 64-bit Macintosh.
Re:good this processor is excellent (Score:2, Interesting)
Re:Should compete with Pentium 4. Even at 1.8GHz. (Score:2, Interesting)
because even after a basic architecture course in college your would realize that all modern processors have multiple functional units which allow for much more than a single or even 3 instructions to be on the fly in a processor. I took my graduate architecture course from someone who was on the design team of the P4 and he eluded to us that the P4 has something like 130ish instructions on the fly at any given time, not just 1...
dave
Re:Power 4, here we come (Score:3, Interesting)
I think what the above poster was referring to was the time and energy that Apple has reportedly spent making sure that OSX can be ported to multiple platforms. There have been rumors of OSX (or at least Rhapsody) running on everything from ARM through Alphas and UltraSparc processors.
How many of those rumors are true? Well, without being inside Apple, it's hard to know, but I wouldn't be surprised. NetBSD and its associated utilities run on just about everything under the sun. I have no idea how portable the MACH kernel is, but I'm guessing it's been ported to the ARM and the Alpha. That leaves the interface. Keeping that platform independent might be tricky, but I'll bet Apple's been keeping it in mind. They've known that the G5 was going to be 64 bit for a year or two now..
Re:only 1.8 GHz? (Score:3, Interesting)
Re:Should compete with Pentium 4. Even at 1.8GHz. (Score:4, Interesting)
The P4 processes instructions in a pipeline. The pipeline can contain 20 instructions at any one time, but each instruction is only finished once it exits the pipeline.
Same goes for the 970, I'd imagine.
To truly increase instructions per cycle, you have to add extra pipelines (and a lot of extra circuits to prevent instructions from stepping on each other)
If pipelines were always full, and all instructions were equivalent, the P4 would beat the pants off of the 970. But the pipeline is not always full because instructions often depend on the results of other instructions, and not all operations are equal in their requirements.
So shorter pipelines often handle instruction dependancies better resulting in better performance, while (for other reasons) longer pipelines are easier to design for higher Ghz.
Does anyone remember... (Score:2, Interesting)
Re:+1 insightful (Score:5, Interesting)
Re:+1 insightful (Score:5, Interesting)
I think it's quite silly of HP to say that "IBM's Power4 architecture is outclassed in performance". Really? A 10% difference qualifies as outclassed? I don't agree. And the POWER4's SPECint score is better. "Outclassed?" Hah.
Of course the proof is in the pudding. Let's see what actually hits the streets. Apple has now been "just around the corner from really kicking Wintel's butt" performance-wise for about 8 or 9 years, but it has yet to happen. We were all led to believe that the PPC would blow away x86 and that never happened. With luck, IBM will actually deliver a really kick-ass CPU at clock speeds close to the x86 family, and the superior per-clock performance will actually make it faster. But there would still be the question of price/performance. If Joe PC Buyer can buy a faster PC for the price of a Mac, it doesn't matter that the Mac runs cooler, or at a lower clock speed, or in 64-bit mode. Joe will just say "my $500 PC is faster than your $1500 Mac, end of story". And he will have a good point. Until that changes, the only people who care are the people who are willing to pay a premium for OS X and the Mac experience, and people who need something faster than the fastest desktop PC but still want a user-friendly mainstream desktop OS. The folks who use Office and Outlook all day won't be able to justify the extra $1000 or whatever it would cost to get a Mac that performs similarly.
I'd also like to remind everybody that benchmarks don't necessarily reflect real-world performance. This is a very synthetic benchmark that is great for telling you what the best-case raw CPU performance of these CPUs can be, but it doesn't prove that $REAL_APP will see those performance gains over older CPUs.
In particular it's not clear what the performance cost would be of using code compiled for a PPC604 would be vs. using code compiled with the very best compiler for the POWER4. I'm sure that Steve Jobs will crow about another highly-optimized Photoshop benchmark that we can all wish represented overall system performance, but it doesn't. That said, I imagine that the really important professional creative apps (you know, the ones that cost thousands of dollars per seat and really beat the @%$%@$% out of the CPU) will be quickly updated for the new CPUs because their customers will demand it. (To be fair, the same is true for the Itanium.)
Re:altivec repurcussions? (Score:3, Interesting)
Yea, it was The Register (slowly...remembering...)
The new IBM chip had the same amount of instructions as AltiVec, and when somem digging was done, the name of the instruction set was the same as the generic name for AltiVec (also mentioned in the Register article, verified at IBM's & Motorola's sites?)
I'm sorry I haven't posted links, but I gotta grab lunch before I get pulled aside for troubleshooting again.
Re:Need? (Score:4, Interesting)
The difference is that we have had plenty of 64 bit processors aimed at the lower end and they just don't work. It is too expensive to bring in 64 bits from RAM to cache when the average variable has less than 8 significant bits. Hence the packed words of VLIW Itanium.
Back when my job description included developing code for the Alpha and the Pentium, just paging in the larger 64 bit code killed the speed advantage of the Alpha chip.
Re:Should compete with Pentium 4. Even at 1.8GHz. (Score:4, Interesting)
Part of what's at stake here is how many instructions are decoded/dispatched each clock cycle and then other factors like branch-prediction and such muddy the waters a bit more. In the end, the 'instructions per cycle' is really more of an average than anything else, as not every instruction will be a candidate for sending through the parallel functional units, etc. Taking into account the efficiency of the branch-prediction unit is important, too, since you could take a wrong turn and have to clear out all your functional units, at every stage of the pipeline and start over again, in certain circumstances. The fewer times this happens, the more effective your CPU will be at pushing the bits around.
Bottom line: modern processor mechanics are far more sophisticated than can be easily summarized by any one number or neat phrase. Just ask AMD about that one
Re:Well... [NOPE] (Score:3, Interesting)
Yes... they are both Mach but not quite the same.
I wouldn't call the Mach that Tru64 is based on the same kernel as the other two either [its Mach 2.5 I think]
Re:Should compete with Pentium 4. Even at 1.8GHz. (Score:2, Interesting)
But the really big difference is number of registers. In short, the more registers you have, the more instructions you'll be able to run in parallel, in general. The PowerPC architecture, like many RISC architectures, specifies 32 general-purpose registers, whereas the P4 specifies only 8. With 32, there's a lot more room for recognizing parallelism by singling out which operations depend on the result of which other operations. Such dependencies force you to run operations sequentially, whereas the lack of such dependencies allows you to run them in parallel.
The chip with more registers, therefore, will take better advantage of its parallel execution units. It's also a good reason for Intel to pump up the clock speed (although doing it at the expense of pipeline depth can be counterproductive) while IBM pumps up the parallelism.
Re:Should compete with Pentium 4. Even at 1.8GHz. (Score:3, Interesting)
Number of parallel units and parallel execution is a very important factor in some performance tests - the original Pentium could either do int/float or MMX and required a context switch to flip between them, while Altivec could run at the same time as Int and Float operations (and multiple - I think 3 - could be processed at the same time). Alas, Motorola was slow out the gate, delaying the G4 multiple times, and Intel released the parallel-able SIMD around the same time (if not first) and had kicked performance well above the Motorola chips shortly afterward, which mostly made up for the aformentioned flaws.
Also, I believe some of the extra non-general purpose registers are used for context switching by the processor in PPC systems, where Intel's chips grab this information from L1 cache. I don't know if this is true for newer chips, though (even circa Pentium 2)
IBM's Press Release (Score:2, Interesting)
The new chip, called the IBM PowerPC 970, is derived from IBM's award-winning POWER4 server processor to provide high performance and additional function for users. As the first in a new family of high-end PowerPC processors, the chip is designed for initial speeds of up to 1.8 gigahertz, manipulating data in larger, 64-bit chunks and accelerating compute-intensive workloads like multimedia and graphics through specialized circuitry known as a single instruction multiple data (SIMD) unit.
"IBM's new PowerPC 970 64-bit chip is all about bringing high-end server processing power to the desktop, low-end server and pervasive space," said Michel Mayer, general manager, IBM Microelectronics Division. "IBM is committed to helping more customers put our expertise in advanced chip design and manufacturing technology to work for them."
The chip incorporates an innovative communications link, or "bus," specially developed to speed information between the processor and memory. Running at a speed of up to 900 megahertz, the bus can deliver information to the processor at up to 6.4 gigabytes per second, to help ensure that the high-performance processor is fed data at sufficient speeds.
Re:good this processor is excellent (Score:3, Interesting)
It is a non-strict subset plus a non-strict superset. In other words they removed some POWER instructions (like the fused multiply-add) and added other (PPC has a whole set of single percision FP instructions). There are other POWER extentions PowerAS for example (which I think is strictly a superset for 256 bit addressing, but I'm not positave!).
Of corse many POWER CPUs implment the PowerPC instruction set also, but there is no requirment what so ever that they do so! The POWER4 does at least POWER, PowerPC, and PowerAS. However...
...the PowerPC instruction set doesn't include the AltiVec SIMD instructions, not technically. So you can have a fast PowerPC CPU that is mostly useless to Apple because while Apple doesn't depend on AltiVec (they run on the G3 after all which has no AltiVec!), they really really run faster with it. A 1.8Ghz AltiVec-less CPU may well run signifigantly slower then a 667Mhz AltiVec CPU for some commonish tasks (MP3 encoding for example, and some screen effects).
Complex innit? Welcome to IBM's world.
SPEC CPU is not meant to be a synthetic benchmark (Score:3, Interesting)
SPEC int2000 [spec.org] consists of gcc, gzip, perl, bzip2, crafty (a Free chess engine), and some other stuff. I happen to be interested in building a computer to run crafty fast, so it's very handy to have good benchmark results for it on recent AMD and Intel CPUs. (Athlons kick P4 butt on crafty, probably because of bit shifts and things like that that P4 is slow on.) Many people would find the gcc, perl, and compression benchmarks interesting when buying a *NIX workstation.
SPEC fp2000 [spec.org] includes Mesa, but only doing software rendering. The other programs are mostly scientific computing apps. (Not just synthetic matrix multiplies or things like that.)