Apple Is Buyer of New 64-Bit IBM Chips

ohmygod2 wrote to us with a story from SF Gate that Apple, unsurprisingly, is going to be one of the purchasers of IBM's PowerPC 970. At this time, though, it's unclear where Apple is going to actually *use* said chip.Update: 10/14 15:53 GMT by H : Follow-up to Tim's story.

Good news roundup

[mgaiman]

Google News [google.com] of course has pretty much all the acticles. They are all based upon the same IBM press release, but many make slightly different predictions.

Re:How does this relate to the G5?

[LeapingGnomeArs]

This is an IBM chip. The fabled G5 is the next generation chip from Motorola, Apple's current supplier of G3 and G4 chips. It seems Motorola is aiming the G5 squarely at the embedded market, either because Apple already decided to go with IBM or Motorola did not feel the development effort was worth designing for Apple's needs.

Re:+1 insightful

[ergo98]

Both the Power4 and Itanium are tremendously powerful processors. See this page [hp.com], ironically intending to promote the Itanium2 (which is a tremendously powerful chip), to see how a 1.3Ghz Power4 compares with a P4.

Another Source for information....

[BlameFate]

Wired.com has this article:

http://www.wired.com/news/mac/0,2125,55722,00.html [wired.com]

This is being discussed all over (here, Ars, Macworld) but the Wired article takes a much more "done-deal" tone than any of the other commentary I have seen yet. It suggests the possibility of Macs with 4TB of ram too :-)

Re:EETimes article has more details..

[mgaiman]

Over at AppleInsider [appleinsider.com] There has been much talk of IBM using an on chip integrated memory controller. This would be good because it would be FAST, but bad because it would probably use a proprietary form of RAM. So I guess we'll see.

Wait...

[aengblom]

But wait...

Slashdot:

"Apple: Apple Is Buyer of New 64-Bit IBM Chips"

SF Gate:

"Apple, IBM and Motorola declined to comment on the switch, which has been rumored as the processors in Macintosh computers have trailed Windows-based counterparts in clock speed."

Wake me when one of the companies comments please. They will, but be patient before yelling CONFIRMED!

Thanks

Furthermore..

[WittyName]

In terms of die size, a rough measure of cost, the PowerPC 970 measures 118 mm2, against 131 mm2 for the Northwood 2.X-GHz Pentium 4. Both the IBM and Intel parts are being made in 130-nanometer CMOS on 300-mm wafers.

This indicates that the price could be competitive in desktops.

Way to go IBM!

Re:How does this relate to the G5?

[gerardrj]

The 'G5' will be whatever chip Apple slaps on their next 'big' processor upgrade. The G3, G4, G5 designations have nothing to do with the chips themselves or their model numbers. They're just spin that Apple uses to compete with the Pentium 3, Pentium 4, etc lineup. Apple could decide to throw AMD Hammers in their next generation systems and would still call the chip the 'G5'.
Ignorant consumers are unlikely to percieve any performace improvements in models unless there is some underlying technology that gets a new name or a new version number. It's like model years in cars, the 2002 has a higher number than the 2001 model, so it MUST be better, and people drool over it.

Re:Typical Intel PR blather...

[Anonymous Freak]

oh-by-the-way here's our specs for ATA/66 and USB 2.0 (for which the detailed specs hadn't been finalized, and which didn't start hitting mainstream systems until some 2 years later).

Disclaimer: I used to work for Intel's server motherboard division. I don't think I'm biased, but wanted to get that out of the way.

1. USB 2.0 still isn't in 'mainstream' systems. I'd give it another 6 months.
2. It has been more than two years since FireWire came out. The first FireWire Mac was the 'Blue and White' G3 in January 1999, and FireWire cards were an option even before that.
3. Intel is a member of the IEEE1394 working group, and early in FireWire's life, Intel supported it, only to distance themselves when USB 2.0 was announced.
4. Intel has Intel-branded motherboards with FireWire onboard.
5. ATA/66 has nothing to do with FireWire or USB at all... Intel doesn't even dictate ATA standards, although I'm sure they have a lot of clout. (Heck, Maxtor got their 'FastDrives', a.k.a. ATA/133 accepted by the ATA standards board, against Intel's objections...)

Re:1.8ghz.....

[theCat]

MHz and GHz are fine, but that's just RPMs. As anyone who has driven a bored out V8 or massive V10 will tell you, there is no replacement for displacement. You can rev a crappy 2L engine to 7,000rpm and make your itty bitty wheels spin and make a nice smell. But if you want to throw asphalt into the air and stike terror into living things you put the pedal to 8 or 10L of fire-breathing cast iron.

The Power line from IBM has that kind of displacement. You don't need GHz, or at least not as many, to get a lot of torque out the back end. And of course once you get torque, you can work on the revs. As we've all seen, higher revs happen with improvements to production technique, and are a given. But more torque (ie, more and better logic on the die) takes a strategic investment, and some amount of risk. But I'll take a bigbore Dodge Viper over this years higher-revving econo Tondabishi any day.

Should compete with Pentium 4. Even at 1.8GHz.

[wazzzup]

Despite the fact that the PPC 970 will be introduced at 1.8 GHz while the P4 is expected to be around 3GHz, the 970 will execute 8 instructions per cycle. I can't recall how many instructions per cycle the P4 executes but I believe it is far fewer than 8. Of the handful of articles I read about it, somebody said that the 970 would effectivly compete with a 4-6 GHz P4 as a result of the instructions per cycle efficiency of the chip.

Plus, it's gotta run cooler than a 6GHz P4 would. As a laptop owner, ignoring the superior performance potential of this chip, the cooling and power requirements alone would make me choose a 970 architecture over a Pentium.

Re:How does this relate to the G5?

[pi radians]

The fabled G5 is the next generation chip from Motorola, Apple's current supplier of G3 and G4 chips.

Sorry, but you're wrong. IBM currently supplies Apple with the G3s (for the iBook). Motorola only supplies Apple with the G4s.

The Gn style of naming is Apple's doing. Motorola and IBM use names like PPC 750 or PPC 7440.

If Apple uses this chip in their future you can bet it will be called G5s (if they decide to keep with that naming convention).

Re:How does this relate to the G5?

[technomancerX]

"While the new chips are not strictly PowerPC chips, Apple could really call then whatever the hell they want when they put them in their machines."

Uhm, what are you talking about? This IS a PowerPC chip. It uses the PPC instruction set and is backward compatible with the 32 bit G3 and G4.

Re:Will this require application rewritting?

[class_A]

No need. The PowerPC 32bit ISA is a subset of the 64bit version. 32bit apps run in 32bit address space perfectly happily.

You only need to recompile if you need to see the full 64bit address space.

Oh, and don't worry about AltiVec. The AIM alliance jointly developed the Vector SIMD extensions. Apple calls the unit Velocity Engine, Moto uses AltiVec and IBM calls it VMX.

from the horse's mouth

[Hadlock]

http://www-3.ibm.com/chips/news/2002/1014_powerpc. html

Re:1.8ghz.....

[ebuck]

5Ghz of spinning it's wheels is a fraction of what a few Ghz of actual work is worth.

Last I checked the G4 had a 4 stage bus, and the P4 had a 20 stage bus. Although the P4 at full effiency can really move, the extra bus stages make it very hard to ever utilize the chip at it's full rating as instructions must "predict" that they won't interfere with the other 19 operations already in progress.

Add to that a growing lack of interest in Ghz as even the lowest powered machines are amplely powered to run a word processor / spreadsheet.

There are many other points to argue (like 32 bit processing vs 64 bit processing) but I don't think that 1.8Ghz will hurt Apple in the least. Especially with the history of thier 500 Mhz machines outperforming 1Ghz Intels.

Re:EETimes article has more details..

[dhovis]

Hey, come on. Read the article you linked to!

The 970 also sports a cache-coherent, 900-MHz processor bus capable of data rates up to 6.4 Gbytes/second.

Keep in mind that DDR333 runs at 167MHz, so this new processor has a bus that can do DDR at 450MHz (DDR900), or quad-pumped 225MHz (QDR900?), or maybe <Sarcasm>PC900 SDRAM</Sarcasm>.

Re:only 1.8 GHz?

[Hadlock]

it should scale up to 8GHz. plus, it does 8 instructions per cycle, vs. the G4's 3 per cycle, vs. Intel's P4's 1 instruction per cycle

IBM was already in the game

[Anonymous Coward]

The company, which has used Motorola microprocessors in most of its Macs since 1984

We need to remind that the first PowerPC chip that was used in Macs was developped by Motorola, IBM, Apple and Novell (yes, Novell).

Re:good this processor is excellent

[Anonymous Coward]

Insightful? Seems to me like the poster AND the moderators have no clue.

The zSeries uses a 64bit CPU, yes, but not a Power4, which is used in the iSeries and pSeries. It's rather a 64bit architecture compatible with the S/390.

In other words, the zSeries is a mainframe, not a server. It might serve lots of pages because as all mainframes it's tuned for I/O, but for example its floating-point performance is terrible. The average laptop or desktop performs better than a mainframe in FP, because that's not a high priority in business applications. Of course, when it comes strictly to I/O, there's no hope of competing with a zSeries and the like.

Re:1.8ghz.....

[MoneyT]

FYI, the G4s have 7 stage pipelines [apple.com] It's in the side bar about halfway down the page.

Re:If only they would...

[Graff]

MS is invested in Apple. How does that work? MS kept Apple alive so that it would have a survivor in PC market to compete again

Actually this is very far from the truth. Microsoft bought approximately $150 million of Apple's non-voting stock. This was a drop in the bucket, since Apple had several billion dollars in the bank at the time. In fact the deal was more in Microsoft's favor since Apple's stock was on the rise. You can read all about the original deal in this article at pcmag.com [pcmag.com]

Over the past few years Microsoft has sold most, if not all, of the $150 million in stock and has made a handsome profit on it. Right now Microsoft has very little stake, if any, in Apple as a stockholder. That being said, the 5 year co-development deal between Apple and Microsoft came to an end this past summer and now it is open season between the two. They both say that they will continue to cooperate for their mutual benefit but you can already see some of the signs of the fierce competition showing.

Re:How does this relate to the G5?

[Ninja Programmer]

G5 is shown on the Motorola PPC Roadmaps. With the advent of this IBM CPU, I expect the G5 to be exactly one thing: Cancelled.

Re:+1 insightful - Math Required

[2nesser]

Just to throw some math out there to help screw up the difference between clock speed and processor speed.
These equations give a performance ratio n...

Performance(a)/Performance(b) = n
Execution Time(b)/Execution Time(a) = n

CPU execution time for a program = (CPU clock cycles)(Clock cycle time for a program)
-or-
CPU Ex. Time for a program = (CPU clock cycles for a program)/(clock rate)

Where (CPU clock cycles for a program) = (Instructions for a program)(Average clock cycles per instruction)

Now we are dependant on the chips architecture as stated in the above response by Slashdotess. Are we running CISC (Complex Instruction Set Computer [IE. Intel]) or RISC (Reduced Instruction Set Computer [IE. SPARC, MIPS]). I'm not sure what Mac's are running.

When in doubt break out the math.
Chris

Good Power 4 Review..

[Leimy]

Skip to the happy ending where a 1.3Ghz Power4 beats a 2.2Ghz Pentium 4.:)
http://www.digit-life.com/articles/ibmpower4 /

Re:altivec repurcussions?

[mikedaisey]

Altivec was developed by the AIM alliance (Apple, IBM and Motorola). There are some IP issues, but the basic gist is that any of the three partners can develop Altivec-compatible architectures...so this should be a non-issue.

Re:Umm, yes

[Jobe_br]

Not speaking as a pro here, but I do know that Apple's mobo architecture recently has been to split as many system pieces onto their own independent buses as possible. Surfing over to apple.com's hardware section should provide some insight, as should ars technica & tom's hardware, which recently had some articles about this.

Its been cited as a key difference between the Mac system architecture and the PC system architecture - different buses for AGP bus data, processormemory, processorPCI, etc.

I imagine this will continue to be the case - don't know if it impacts the aforementioned speeds, though.

Re:Power 4, here we come

[Geekboy(Wizard)]

BSD was written with scalability in mind. It was written for 16-bit machines, but it handles rather well on 32-bit machines. With the exception of the super-super-low-level stuff (bootstrapping the CPU, etc) it is all CPU/arch agnostic.

Re:good this processor is excellent

[Spyky]

Oh, and of course, 64 bit PowerPC code will run on a POWER4, but not on a Motorola PowerPC. But 32-bit PowerPC code that also has Altivec code will run on a Moto but not on a POWER4. So you can't say either is the subset of the the other.

-Spyky

Re: Plus 64-bit advantage

[AHumbleOpinion]

On top of that, I think you should add about 30% for 64-bit processing

Not really. A few specialized apps will benefit from 64-bit, just as a few specialized apps benefit more from Altivec than SSE. But in general 64-bits is irrlevant to typical apps and tools.

64-bit may help indirectly in that the processor will need to fetch instructions and data more quickly, so more transistors will probably be dedicated to this. However these improvements could have been made in a 32-bit CPU as well. It's just that with 64-bit it becomes more of a necessity.

All just speculation, looking forward to seeing what Apple eventually comes up with. That said I'm a bit skeptical since we've had so many PowerPC advancements that were finally supposed to let PowerPC catch up to Intel, and of course nothing really changed.

Re:Well, Duh.

[Anonymous Coward]

which may result in them not being able to release the Itanium series?


Please.... come back to reality.

Intergraph offered to licence the patent for $100 million (or some amount along those lines). That sum isn't beyond their means to write a check for. Unfortunately, for Integraph it also makes it prudent to keep banging away in court too.

Furthermore, IA-64 was always a MIPS/SPARC/POWER/PA-RISC killer. It is a server chip. Eventually, it could be desktop chip.... far into the future. IA-64 was not designed to quickly phase out IA-32.

It is a different statement to say no one needs 64-bits in a computer for unwashed masses and than saying no one needs 64 bits.

Re:Should compete with Pentium 4. Even at 1.8GHz.

[dbrutus]

Now here's a case of when life hands you lemons you make lemonade. The parent was talking about simultaneous execution, i.e. how many instructions per cycle can come out of the end of the pipeline. You're twisting it around to take that number and multiply it by the horribly long pipeline.

Let's go back to basics, every time the processor makes a mistake in guessing what's going to happen next, the pipeline has to be cleared. Every modern CPU faces this problem so you want short pipelines so your penalty is low. Intel has vastly longer pipelines and thus they pay a higher price every time predictive branching screws up.

So having a large number of instructions being simultaneously worked on is a *bad* thing unless they are also being pumped out and executed in large numbers as well. AFAIK, in the P4 they aren't.

According to Ars Technica [arstechnica.com] the P4 in the real world gets 2.5 instructions per cycle done. With the new G5 getting 8 done per cycle with half the pipeline depth, performance should once again favor the Mac side of the PC wars.

Re:Should compete with Pentium 4. Even at 1.8GHz.

[dbrutus]

All currently shipping Intel and AMD desktop microprocessors internally translate x86 instructions to much smaller instructions that are functionally similar to RISC style instructions.

Re:Should compete with Pentium 4. Even at 1.8GHz.

[Anonymous Coward]

With the new G5 getting 8 done per cycle with half the pipeline depth

Yeah, right.

First, 8 is the number of execution units - not necessarily the number of instructions that can be retired per cycle (it's probably lower).

Second, assuming it can use all execution units in a single cycle, do you really think the chip ON AVERAGE will keep every single execution unit filled?

For a more realistic comparison, remember that the P4 is almost at 3 GHz now, and by the end of next year it will be at about 4 GHz. If the P4 does 2.5 instructions on average per cycle, this means the IBM chip needs to AVERAGE 5.6 instructions per cycle just to be on par with the Pentium.

This highlights another problem for Apple: You might get that kind of execution performance from the excellent IBM compilers, but gcc won't even come close...